Next-generation technologies and products designed to drive profitable growth across gaming, immersive platforms, and fuel a significant return to the datacenter
MALAYSIA, Kuala Lumpur, May 7, 2015 — Today, at its 2015 Financial Analyst Day taking place at Nasdaq MarketSite, AMD (NASDAQ: AMD) provided details on the company’s multi-year strategy to drive profitable growth based on delivering next-generation technologies powering a broad set of high-performance, differentiated products across the key areas of gaming, immersive platforms, and the datacenter.
“We see strong long-term growth opportunities across a diverse set of markets for the kind of high-performance compute and visualization capabilities only AMD can provide,” said AMD President and CEO Dr. Lisa Su. “We are focusing our investments on our strongest opportunities to enable our customers to create great products that push the boundaries of what is possible and allow AMD to achieve profitable growth in the years to come.”
IP and Core Technology Updates
AMD showcased a number of engineering innovations at the event, including details on its next-generation 64-bit x86 and ARM processor cores, future graphics cores expected to deliver a 2x performance-per-watt improvement compared to current generation offerings, and breakthrough modular design methodology that reduces system-on-chip (SoC) development costs and accelerates time to market.
Technology-related announcements included:
Development of a brand new x86 processor core codenamed “Zen,” expected to drive AMD’s re-entry into high-performance desktop and server markets through improved instructions per clock of up to 40 percent, compared to AMD’s current x86 processor core. “Zen” will also feature simultaneous multi-threading (SMT) for higher throughput and a new cache subsystem.
Updates on the company’s first custom 64-bit ARM core, “K12” core. These enterprise-class 64-bit ARM cores are designed for efficiency and are ideally suited for server and embedded workloads.
AMD’s plans to extend its graphics technology leadership by offering the first high-performance graphics processing unit (GPU) in the industry featuring die stacked High Bandwidth Memory (HBM) using a 2.5D silicon interposer design. AMD plans to introduce this innovative packaging solution this year with its latest GPU.
In addition to discussing software, security, and other key platform enablers, AMD highlighted its new high-performance network-on-chip (NoC) technology, a modular design approach that leverages re-usable IP building blocks to maximize design efficiency. This breakthrough design approach is expected to lower cost and time-to-market for both AMD’s standard and future semi-custom products.
“We are doubling down on our IP core investments in alignment with our traditional development strengths to address key market needs for performance and customer choice through high-performance, scalable 64-bit x86 and ARM CPU cores and continued graphics leadership,” said Mark Papermaster, senior vice president and chief technology officer, AMD. “In addition, we have built a system for modular design around our new network-on-chip technology designed to substantially increase development agility.”
Computing and Graphics Segment Updates
Additionally, AMD announced updates to its Computing and Graphics (CG) product roadmaps for accelerated processing unit (APU), central processing unit (CPU), and GPU products planned for introduction in 2016 and beyond. The upcoming products address key customer priorities, including increased performance, longer battery life, and improved energy efficiency. AMD also provided further details and publicly demonstrated its 6th Generation A-Series APU, formerly codenamed “Carrizo,” as well as its next-generation GPU offerings launching in the coming months.
AMD’s updated CG product roadmap includes:
New AMD FX CPUs based on the “Zen” core and built using FinFET process technology. Featuring high core counts with SMT for high throughput and DDR4 compatibility, these CPUs will share the AM4 socket infrastructure with AMD’s 2016 Desktop APUs.
7th Generation AMD APUs will enable a discrete-level GPU gaming experience and full HSA performance in the FP4 Ultrathin Mobile Infrastructure.
Future generations of high-performance GPUs will be based on FinFET process technology, which will contribute to a doubling of performance-per-watt.1 These cutting-edge discrete graphics will include second generation HBM technology.
Enterprise, Embedded, and Semi-Custom Segment Updates
AMD detailed the long-term strategy for its Enterprise, Embedded and Semi-Custom Business Group (EESC) to grow across a number of high-priority markets based on leveraging high-performance CPU and GPU cores that allow customers to build differentiated solutions. The near-term will bring continued focus on enabling scalable, semi-custom solutions and growth in the embedded pipeline. Looking ahead, next-generation “Zen” and “K12” cores will bring high performance to the datacenter, a space where AMD plans to regain share with a portfolio that includes x86 and ARM processors, increased power efficiency, and a renewed presence in the high-performance x86 server market.
“AMD’s high-performance IP, efficient modular design methodology, and evolved semi-custom business model will fuel strong growth opportunities across multiple markets,” said Forrest Norrod, senior vice president and general manager, EESC. “In addition to driving sustained growth in our semi-custom and embedded businesses, we’re reaffirming our commitment to high-performance server computing based on our strong set of new product offerings.”
AMD’s EESC roadmap details include:
Next-generation AMD Opteron™ processors, based on the “Zen” core targeting mainstream servers that will enable a broad spectrum of workloads with significant increases in I/O and memory capacity.
Building off of the expected availability of “Seattle”-based systems later this year, AMD detailed plans for its next-generation ARM processors featuring the upcoming “K12” core.
AMD also provided a glimpse into its new high-performance APU targeting HPC and workstation markets that is intended to deliver massive improvements to vector applications with scale-up graphics performance, HSA enablement, and optimized memory architecture.